TL16C550CIPTG4

The TL16C550CIPTG4 is a single UART with 16-byte FIFOs and auto flow control. The receiver and transmitter FIFOs store up to 16 bytes including three additional bits of error status per byte for the receiver FIFO. In the FIFO mode, there is a selectable auto flow control feature that can significantly reduce software overload and increase system efficiency by automatically controlling serial data flow using RTS\ output and CTS\ input signals. The TL16C550CI perform serial-to-parallel conversions on data received from a peripheral device or modem and parallel-to-serial conversion on data received from its CPU. The CPU can read the ACE status at any time. The ACE includes complete modem control capability and a processor interrupt system that can be tailored to minimize software management of the communications link. Standard asynchronous communication bits (start, stop and parity) added to or deleted from the serial data stream.