EF-VIVADO-DESIGN-FL

The EF-VIVADO-DESIGN-FL from Xilinx is Vivado® Design Suite with HL design edition and floating license. It offers a new approach for ultra high productivity with next generation C/C++ and IP based design. When coupled with the new UltraFast™ high level productivity design methodology guide, this unique combination is proven to accelerate productivity by enabling designers to work at a high level of abstraction while facilitating design reuse and users can realize a 10 to 15x productivity gain over traditional approaches. This tool suite is architected to increase the overall productivity for designing, integrating and implementing systems using the Xilinx® UltraScale™, 7 series devices, Zynq® UltraScale+™ multiprocessor system-on-chip device and Zynq®-7000 All Programmable (AP) SoC. The new HL edition supplies design teams with the tools and methodology needed to leverage C-based design and optimized reuse, IP sub system reuse, integration automation and accelerated

• Partial reconfiguration, synthesis, place and route
• Vivado® simulator, Vivado® device programmer, Vivado® logic analyzer
• Vivado® serial I/O, analyzer debug IP (ILA/VIO/IBERT)
• Software defined IP generation with Vivado® high level synthesis
• Block based IP integration with Vivado® IP integrator
• Brings ultra high productivity to mainstream systems and platform designers
• 4x faster implementation, 20% better design density
• Up to 3-speedgrade performance, advantage for low end, mid-range and 35% power advantage in high end