S25FL132K0XMFI011
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S25FL132K0XMFI011 характеристики
Флеш память, Floating Gate Architecture, Последовательная NOR, 32 Мбит, 4М x 8бит, SPI, SOIC.
The S25FL132K0XMFI011 is a 32MB non-volatile Flash Memory Device connect to a host system via a serial peripheral interface (SPI). Traditional SPI single bit serial input and output (Single I/O or SIO) is supported as well as optional two bit (dual I/O or DIO) and four bit (Quad I/O or QIO) serial protocols. This multiple width interface is called SPI multi-I/O or MIO. The SIO protocol uses Serial Input (SI) and Serial Output (SO) for data transfer. The DIO protocols use IO0 and IO1 to input or output two bits of data in each clock cycle. The Write Protect (WP#) input signal option allows hardware control over data protection. Software controlled commands can also manage data protection. The HOLD# input signal option allows commands to be suspended and resumed on any clock cycle. The QIO protocols use all of the data signals (IO0 to IO3) to transfer 4 bits in each clock cycle. When the QIO protocols are enabled the WP# and HOLD# inputs and features are disabled.
- Floating gate architecture
- Serial-input page program (up to 256 bytes)
- Uniform sector erase (4kB) and uniform block erase (64kB)
- SPI clock polarity and phase modes 0 and 3
- Cycling endurance - Typical 100K program-erase cycles on any sector
- Program suspend/resume
- Erase suspend/resume
- Typical 20-year data retention at 55°C
- Three 256-byte security registers with OTP protection
- Low supply voltage protection of the entire memory
- Pointer-based security protection feature
- 50MHz Clock rate normal read (serial)
- 108MHz Clock rate fast read (serial)
- 54Mbps Maximum continuous data transfer rate
- 90nm Floating gate technology
- 256B Program buffer size
- 700µs (256B) Page programming time (typical)
Техническое описание
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