ADSP-SC589KBCZ-4B

The ADSP-SC589KBCZ-4B from Analog Devices is a SHARC+ dual core DSP with ARM Cortex-A5 in 529-BGA package. This SHARC processor is member of SIMD SHARC family of digital signal processors that feature Analog Devices super harvard architecture. It is a floating point processor which is optimized for high performance audio/floating point applications with large on-chip SRAM, multiple internal buses that eliminate I/O bottlenecks and innovative digital audio interfaces (DAI). New additions to SHARC+ core include cache enhancements and branch prediction while maintaining instruction set compatibility to previous SHARC products. By integrating a set of industry leading system peripherals and memory, the ARM Cortex-A5 and SHARC processor is platform of choice for applications that require programmability similar to RISC, multimedia support and leading edge signal processing in one integrated package. It features powerful DMA system, on-chip memory protection & integrated safety features.

• 450MHz ARM Cortex-A5, 32KB (I), 32KB(D) ARM core L1 cache, 256KB ARM core L2 cache
• Single ARM core, dual SHARC+ core, 102 GPIO, 40 DAI pins, USB 2.0 HS + PHY (host/device)
• 450MHz SHARC+ core1, 450MHz SHARC+ core2, 640KB SHARC L1 SRAM/core, 8-channel multichannel 12bit ADC
• 256KB L2 SRAM, 512KB L2 ROM, two DDR3/DDR2/LPDDR1 controller (16bit, system memory), PCIe 2.0, RTC
• USB 2.0 HS + PHY (host/device/OTG), 10/100/1000 /AVB EMAC + timer IEEE 1588, SDIO/eMMC
• 1.05V to 1.15V internal core supply voltage (CCLK <= 450MHz), 3.13 to 3.47V analogue supply voltage
• 2 DAI, 3 I2C (TWI), 1 quad/2 dual data bit SPI, 2 CAN2.0, 3 UARTs, 3 EPWMs & 2 watchdog timers
• Cryptographic hardware accelerators, fast secure boot with IP protection, support for ARM trustzone
• High performance pipelined FFT/IFFT engine, FIR, IIR, HAE, SINC offload engines, 10/100 std EMAC
• Operating temperature range from 0°C to +70°C