S912ZVMC12F1MKH

The S912ZVMC12F1MKH is a MagniV mixed signal S12ZVM-family 16-bit Microcontroller using the NVM + UHV technology that offers the capability to integrate 40V analog components. This family reuses many features from the existing S12/S12X portfolio. The particular differentiating features of this family are the enhanced S12Z core, the combination of dual-ADC synchronized with PWM generation and the integration of "high-voltage" analog modules, including the voltage regulator, Gate Drive Unit and either Local Interconnect Network physical layer or CAN Physical layer. The MC9S12ZVM-Family includes error correction code (ECC) on RAM and flash memory, EEPROM for diagnostic or data storage, a fast analog-to-digital converter (ADC) and a frequency modulated phase locked loop (IPLL) that improves the EMC performance. The MC9S12ZVM-Family allows the integration of several key system components into a single device, optimizing system architecture and achieving significant space savings.