SN74VMEH22501DGGR

The SN74VMEH22501DGGR is a 8-bit Universal Bus Transceiver and two 1-bit bus transceivers with 3-state outputs. It is designed for 3.3V VCC operation with 5V tolerant inputs. The UBT™ transceiver allows transparent, latched and flip-flop modes of data transfer and the separate LVTTL input and outputs on the bus transceivers provide a feedback path for control and diagnostics monitoring. The high-speed backplane operation is a direct result of the improved OEC™ circuitry and high drive that has been designed and tested into the VME64x backplane model. The B-port I/Os are optimized for driving large capacitive loads and include pseudo-ETL input thresholds (1/2 VCC ±50mV) for increased noise immunity. These specifications support the 2eVME protocols in VME64x (ANSI/VITA 1.1) and 2eSST protocols in VITA 1.5. With proper design of a 21-slot VME system, a designer can achieve 320Mbytes transfer rates on linear backplanes and, possibly, 1Gbyte transfer rates on the VME320 backplan