ADS62P49EVM

The ADS62P49EVM is a circuit board that allows designers to evaluate the performance of ADS62P49 device, a dual channel 14bit 250MSPS analog to digital converter. The ADC features a user selectable parallel CMOS or DDR LVDS output. Users can use either the TSW1100 (CMOS mode) or TSW1200EVM (DDR LVDS mode) to capture the data from the converter. The EVM provides a flexible environment to test the ADS62P49 under a variety of clock, input and supply conditions. The EVM also includes an open socket for new 10 output low Jitter clock synchronizer and Jitter cleaner device, the CDCE72010, which can be used to drive the clocking input to the ADS62P49. Open sockets are also provided for an external VCXO and crystal band pass filter allowing for rapid evaluation of a combined high performance ADC and clocking circuit equivalent to a final system level solution.