LPC1850FET256,551

The LPC1850FET256,551 is a 32-bit Flashless Microcontroller based on ARM Cortex-M3 core with RISC architecture operates at a maximum frequency of 180MHz. The ARM Cortex-M3 is a next generation core that offers system enhancements such as low power consumption, enhanced debug features and a high level of support block integration. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching. The device incorporates 200kB of on-chip SRAM, a quad SPI flash interface (SPIFI), a state configurable Timer/PWM (SCTimer/PWM) subsystem, two high-speed USB controllers, Ethernet, LCD, an external memory controller and multiple digital and analog peripherals and 164 general-purpose I/O pins.