IS42S16320B-7TLI

The IS42S16320B-7TLI is a 512Mb Synchronous DRAM achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. The 512Mb SDRAM is organized as 8M x16x4 banks, 54-pin TSOPII and 54-ball W-BGA. The 512Mb SDRAM is a high speed CMOS, dynamic random-access memory designed to operate in 3.3V Vdd and 3.3V Vddq memory systems containing 536,870,912 bits. Internally configured as a quad-bank DRAM with a synchronous interface. Each 134,217,728-bit bank is organized as 8,192 rows by 1024 columns by 16 bits. Each of the x8's 134,217,728-bit banks is organized as 8,192 rows by 2048 columns by 8 bits. The 512Mb SDRAM includes an AUTO REFRESH MODE and a power-saving, power-down mode. All signals are registered on the positive edge of the clock signal, CLK. All inputs and outputs are LVTTL compatible.